Build With Us

We’re looking for first principle thinkers who believe in an open future. We build RISC-V CPUs, Tensor AI processors, and open-source software to unlock the next innovations in AI. Build now, for tomorrow.

Tenstorrent Map
Our locations

North America

Santa Clara
2600 Great America Way, Suite 501 Santa Clara, CA 95054 US
Fort Collins
2580 E Harmony Rd. Suite 201 Fort Collins, CO 80528 US
Boston
5 Mt Royal Ave #220 Marlborough, MA 01752 US
Austin
7717 Southwest Pkwy Building #3, Suite 200 Austin, TX 78735
Toronto
150 Ferrand Dr Suite 901 North York, ON M3C 3E5 Canada

Asia

Bengaluru
Unit No 201, 2nd floor, Block B1 Brigade Properties Pvt Ltd SEZ Brookfields, Kundalahalli Bangalore 560037 India
Beijing
5/F, Tower C, Lei Shing Hong Plaza, No.8 Wangjing Street, Chaoyang District, Beijing 100102, PR China
Pangyo (Gyeonggi-do)
Greits Pangyo 4th FLR 117 Bundangnaegok-ro, Bundang-gu, Gyeonggi-do Korea
Tokyo
8F T-LITE Building 2-4-7 Toranomon, Minato-ku Tokyo

Europe

Beograd
Bulevar Milutina Milankovica 1i 11070 New Belgrade Serbia
Munich
Feringastrasse 6 85774 Unterföhring, Germany
Warsaw
50 Krucza Warsaw, Poland, 00-025
Build With Us

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been sanctioned by the U.S. government.

Our positions below will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

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93 jobs found
AI Compiler
Sr. Engineer, Software - AI Compiler
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
AI Compiler
Sr. Engineer, Software - Simulation/Hardware Modeling
Austin, Texas, United States
AI Compiler
Sr. Software Engineer, AI Compiler
Toronto, Ontario, Canada
Architecture
Chiplet Physical Design Engineer
United States
Architecture
Fabric SOC Architect
United States
Architecture
High-Performance Computing Architect
United States
Architecture
Memory Architect
North America
Architecture
Network ASIC Designer
United States
Architecture
Power Architect, AI Data Center Chiplets
United States
Architecture
Project Administrator
Tokyo, Japan
Architecture
RISC-V AI / HPC & Agentic Software Engineering Lead
North America
Architecture
Senior DFT Engineer, Architecture
Japan
Architecture
Verification Engineer
Japan
Automotive
RTL Engineer, Automotive Robotics
Munich, Germany
Automotive
Technical Writer, Automotive Robotics
Munich, Germany
Automotive
Test Engineer, Automotive Robotics
Munich, Germany
Automotive Architecture
Automotive and Robotics SOC Architect
United States
CPU
RISC-V CPU Microarchitecture / RTL
United States
Customer
Field Application Engineer, AI Systems & Solutions
Austin, Texas, United States; Santa Clara, California, United States
Customer Success
Director, Systems & Solutions
Austin, Texas, United States; North America; Santa Clara, California, United States; Toronto, Ontario, Canada
DFT and Test
Staff Design for Test STA Engineer
Santa Clara, California, United States
Design Verification
CPU Design Verification Technical Lead
United States
Design Verification
Formal Verification Engineer
United States
Dev Rel
Developer Relations Engineer, Advocacy
Austin, Texas, United States; Fort Collins, Colorado, United States; Portland, Oregon, United States; Santa Clara, California, United States; United States
Dev Rel
Developer Relations Engineer, Tools
Austin, Texas, United States; Fort Collins, Colorado, United States; Portland, Oregon, United States; Santa Clara, California, United States; Toronto, Ontario, Canada; United States
DevInfra and ML
Sr. Staff Engineer, DevOps - Automation and Software Tooling
United States
DevInfra and ML
Sr. Staff Engineer, Hardware Infrastructure Lead
Austin, Texas, United States; Santa Clara, California, United States
DevInfra and ML
Staff Engineer, HPC Infrastructure
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
DevInfra and ML
Staff Engineer, HPC Systems Software
Austin, Texas, United States; Santa Clara, California, United States; United States
Digital Design
Sr Staff Engineer, SoC RTL Design
Toronto, Ontario, Canada
Digital Verification
Staff Engineer, ASIC Design Methodology
Boston, Massachusetts, United States; Toronto, Ontario, Canada
Digital Verification
Staff Engineer, SoC - DFD Design Verification
Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Experience
Design Director
United States
Experience
Hardware Technician
Santa Clara, California, United States
Experience
Manager, Data Center & Lab Deployments
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Experience
North American Sales Lead
United States
Experience
Presentation Strategist, Design
United States
IP Product
Staff Mixed Signal Design Engineer, Silicon Validation
Santa Clara, California, United States; Toronto, Ontario, Canada
IP Product Eng
Field Applications Engineer, IP Product
Austin, Texas, United States; Raleigh, North Carolina, United States; Toronto, Ontario, Canada
IP Product Eng
Sr. IP Product Engineer, AI Processor
Toronto, Ontario, Canada
IT
Staff Business Applications Engineer, IT
United States
ML Models
Machine Learning Engineer, AI Models
Cyprus
ML Models
Software Engineer
Tokyo, Japan
Metal
C++ Machine Learning Engineer, Models Training
Gdańsk, Pomeranian Voivodeship, Poland; Warszawa, Masovian Voivodeship, Poland
Metal
C++ Machine Learning Engineer, Models Training
Santa Clara, California, United States
Metal Ops
DevOps Architect
Austin, Texas, United States
Metal Ops
DevOps Architect
Toronto, Ontario, Canada
Metal Ops
Software Engineer, Kernel Development and Optimization
Gdańsk, Pomeranian Voivodeship, Poland; Warszawa, Masovian Voivodeship, Poland
Mixed Signal Design
Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)
United States
Mixed Signal Design
Silicon Validation Engineer
Santa Clara, California, United States
Mixed Signal Design
Staff Analog Design Engineer
United States
Packaging
Package Design Engineer
Toronto, Ontario, Canada; 新北市, New Taipei City, Taiwan
Performance Model
CPU Architect, Load-Store
United States
Physical Design
Physical Design Engineer - Power Grid/EMIR
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States; United States
Physical Design
Physical Design Engineer - STA
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States; United States
Physical Design
Physical Design Flow Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Physical Design
Senior Physical Design Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Physical Design
SoC Physical Design Verification Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Physical Design
SoC Top-Level Physical Design Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Physical Design
Staff Physical Design Engineer – EMIR
Austin, Texas, United States; Santa Clara, California, United States
Physical Engineering
Staff Technical Program Manager, Physical Design
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Physical Engineering
Technical Program Manager, RISC-V IP
United States
Platform Software
Staff Engineer, Systems Software
Australia; United States
RISC V
Director, RISC-V Software Ecosystem
United States
RISC V
Sr. Staff Engineer, Automotive System Software
United States
RISC V
Sr Staff Engineer, CPU System Microarchitect
Austin, Texas, United States
RISC V
Sr. Staff Engineer, Post-Silicon Validation
Bengaluru, Karnataka, India
RISC V
Sr. Staff Engineer,Post-Silicon Validation
Austin, Texas, United States
RISC V
Sr Staff Software Engineer, Toolchain/Compiler
United States
RISC V
Staff Engineer Design Verification
Bengaluru, Karnataka, India
RISC V
Staff Engineer, Platform Security Systems Software
United States
Runtime
GCC Compiler Engineer
Santa Clara, California, United States
Runtime
Software Engineer, Functional Safety
Santa Clara, California, United States
Runtime
Software Engineer, Metal Runtime
Santa Clara, California, United States
Sales
Enterprise GTM
United States
Sales
Startup GTM
United States
Scale Out
Software Engineer, Scale Out
Toronto, Ontario, Canada
Scale Out
Software Engineer, TT-Distributed
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Scale Out
Software Engineer, TT-Fabric
Santa Clara, California, United States
Si Val / Qual
Engineer, PCIe Validation
Vancouver, British Columbia, Canada
Si Val / Qual
Staff, Ethernet Validation Engineer
Santa Clara, California, United States; Toronto, Ontario, Canada
Silicon
Sr. Staff Product Development Engineer - Test Methodology Engineer
Austin, Texas, United States; Santa Clara, California, United States
Silicon
Staff Design for Test Engineer
Austin, Texas, United States; Santa Clara, California, United States
Silicon
Staff, Design for Test Engineer (DFT)
Bengaluru, Karnataka, India
Silicon
Staff Product Development Engineer - ATE Content Developer
Austin, Texas, United States; Santa Clara, California, United States
SoC
SoC - Chiplet Design Lead
Toronto, Ontario, Canada
SoC
Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets
Toronto, Ontario, Canada
Supply Chain
Director, Commodity Management
United States
Systems Engineering
Staff/Sr. Staff Engineer, Diagnostic Development
Toronto, Ontario, Canada
Tensix
Performance Architect, AI HW
Toronto, Ontario, Canada
Tensix
Power Architect
Toronto, Ontario, Canada
Tensix
Risc-V Architect
Toronto, Ontario, Canada
Tensix
Senior Design Verification Engineer, AI HW
Toronto, Ontario, Canada